





Based on its global layout in Wuhan, the Netherlands, Shanghai, Shenzhen and other cities, the company gathers top talents in the integrated circuit industry from home and abroad. Most of the core team members come from first-tier European manufacturers, and 30% of the employees have overseas degrees or work experience.
The company has R&D personnel accounting for over 70% of its workforce, fostering an engineering culture that encourages innovation and pragmatic, in-depth work, as well as a flat management structure and flexible collaborative R&D environment.
We adhere to the principles of utilizing people's strengths and empowering them fairly, enabling talents in R&D, product, marketing, and supply chain positions to leverage their expertise to achieve tangible results and integrate their personal technological ideals into the industrialization of domestically produced sensor chips.
1. Analyze system principles, perform modeling, build demos, and conduct testing based on customer requirements and the company’s strategic direction; define system/product strategies, decompose performance targets, and guide the design of each module;
2. Coordinate cross-functional teams to complete system-level tasks and deliver high-quality technical documentation;
3. Participate in defining long-term product technology roadmaps and collaborate with customers;
4. Guide product mass production.
1. Master’s degree or above in Microelectronics, Optoelectronics, Electronic Engineering, or related fields; at least 5 years of experience in the semiconductor industry, with mass production project experience preferred;
2. Strong hardware background, software modeling capability, hands-on engineering skills, and proven coordination and execution ability;
3. Ability to structure and solve complex problems, think innovatively, learn new technologies quickly, and demonstrate strong self-motivation;
4. Experience in chip design is preferred;
5. Experience in optoelectronics, optical communication, or optical interconnect is a plus.
1. Define digital front-end Spec, perform system clock planning, design implementation, logic synthesis, and timing analysis, and prepare related design documentation;
2. Verify chip functionality using FPGA, collaborate with verification engineers to improve coverage, and work with backend engineers to optimize Floorplan;
3. Analyze chip issues reported from applications, collaborate with test engineers for debug analysis, co-develop mass production test plans, and assist in bring-up and tuning;
4. Improve chip design flows and methodologies, modularize digital designs into reusable IP, and enhance overall design quality and efficiency.
1. Master’s degree or above in Microelectronics, Electronic Engineering, or related fields;
2. Solid foundation in digital circuits, DSP (Digital Signal), and Signals & Systems, with familiarity in the digital IC design flow;
3. Familiar with assembly or C programming, and proficient in scripting languages such as Shell and Perl;
4. Proficient in Verilog HDL, and experienced with simulation and synthesis EDA tools such as VCS and NCSim.
5. Experience in digital circuit module design and Simulink DSP system modeling;
6. Preferred experience in areas such as Sigma-Delta ADC/DAC digital design, DSP module implementation, and mixed-signal system design and verification.
7. Strong professional ethics, good communication and coordination skills, and a collaborative team spirit.
1. Participate in IC project initiation and define Spec for individual modules;
2. Independently take responsibility for the development of analog IC modules, including design, simulation, and verification;
3. Collaborate with team members to accumulate IP and conduct pre-research on new modules;
4. Work with layout engineers to complete the layout of corresponding modules;
5. Assist the testing and product teams in module testing, debugging, failure analysis, and mass production.
1. Master's degree or above in Microelectronics, Electronic Engineering or related majors;
2. Solid understanding of semiconductor devices and fabrication processes, with strong familiarity with CMOS/BCD technologies;
3.Familiar with IC design flow, Linux/Unix systems, and the Cadence design environment; proficient in using lab instruments (oscilloscopes, signal generators, spectrum analyzers, etc.);
4. Experience in designing and taping out products such as ADC/DAC, PLL, Bandgap, and LDO is preferred;
5. Detail-oriented, conscientious, with strong communication and teamwork skills.
1. Design high-performance control algorithms for brushless motors (BLDC/PMSM), including FOC, SVPWM and current/speed/position triple closed-loop control;
2. Implement sensorless control strategies (sliding mode observer, extended Kalman filter, high-frequency injection, etc.);
3. Develop algorithms for motor parameter online identification, adaptive control and efficiency optimization (MTPA, field weakening control), model predictive control (MPC), adaptive control, robust control (H∞/sliding mode) design and implementation;
4. Model and analyze the characteristics of motors and loads, design controllers to achieve ultra-high efficiency, ultra-quiet operation and fast dynamic response;
5. Develop high-precision position signal chain algorithms, including noise suppression, nonlinear calibration, temperature compensation, and error modeling;
6. Implement multi-sensor data fusion (e.g., magnetic sensors + IMU, multiple position sensors) to enhance system robustness;
7. Carry out embedded implementation, debugging, and performance optimization of control algorithms to meet real-time requirements.
1. Master's degree or above in related majors such as Power Electronics, Automation, Electrical Engineering, Control Theory, Mathematics, Physics;
2. Proficiency in motor control theory, skilled in FOC, SVPWM, PID/PI regulators and parameter tuning;
3. Experience in sensorless control algorithm development, familiar with state observer and Luenberger observer design methods;
4. Skilled in MATLAB/Simulink modeling, simulation and automatic code generation, with embedded C language implementation capabilities;
5. Familiar with ARM Cortex-M series MCU or DSP platforms, with experience in RTOS-based development is preferred;
6. Strong hands-on debugging skills and problem-solving resilience, with a passion for tackling challenging electromechanical system problems.
1. Design and implement multi-channel audio signal acquisition, preprocessing and enhancement algorithms;
2. Develop modules for adaptive filtering, Acoustic Echo Cancellation (AEC), Noise Suppression (ANS, ENC), Active Noise Cancellation (ANC), Automatic Gain Control (AGC), transparency mode, and spatial audio;
3. Optimize the implementation of algorithms on fixed-point DSP platforms to ensure real-time performance and memory resource constraints;
4. Design targeted suppression strategies for acoustic scenarios (wind noise, reverberation, transient noise), and address complex environmental interference (electromagnetic interference, structural noise, multipath effects);
5. Build an algorithm simulation and verification platform, formulate algorithm indicators and test plans, and lead the implementation and optimization of algorithms on embedded DSP/CPU.
1. Master's degree or above in related majors such as Signal Processing, Acoustics, Communications, Mathematics, Physics;
2. Proficiency in digital signal processing theories, including adaptive filtering (LMS/NLMS/RLS), frequency domain processing, subband filtering, time-frequency analysis, array signal processing and parameter estimation;
3. Skilled in MATLAB/Python algorithm simulation, with experience in fixed-point implementation using embedded C language;
4. In-depth research experience in at least one of the following fields: audio algorithms, sensor fusion, precision measurement, wireless communication physical layer;
5. Familiar with audio interface protocols such as I2S and PDM,experience in audio driver or HAL (Hardware Abstraction Layer) development is a plus;
6. Experience in array signal processing and beamforming (Delay-and-Sum, MVDR, GSC) is preferred;
7. In-depth understanding of algorithm complexity, real-time performance and hardware resources, with excellent logical analysis and problem location capabilities.
1. Responsible for the design, training and deployment of edge-side neural network algorithms, optimizing the real-time performance of models on resource-constrained embedded platforms;
2. Develop low-power algorithms for voice wake-up, voice activity detection (VAD) and environment-adaptive noise reduction;
3. Implement speech noise reduction and speech enhancement solutions combining beamforming techniques with deep learning for multi-microphone array scenarios;
4. Process and analyze multi-modal sensor data to build robust perception algorithms;
5. Optimize neural network inference efficiency, including quantization, pruning, knowledge distillation and dedicated DSP/NPU adaptation
1. Master's degree or above in related majors such as Signal Processing, Computer Science, Electronic Engineering, Mathematics, Physics
2. Proficiency in deep learning frameworks (PyTorch/TensorFlow) and experience in edge-side AI model deployment (TensorFlow Lite, ONNX, CMSIS-NN, etc.)
3. Familiar with audio front-end processing pipelines and master the principles of traditional 3A algorithms such as AEC, ANS, AGC
4. Embedded or C/C++ programming skills, familiar with ARM Cortex-M/A series or similar embedded platform optimization
5. Experience in lightweighting speech models such as RNN-T, Transformer, or Conformer is preferred.